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; Only works on Cortex-M profile ARMv6-M and ARMv7-M
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; Uses only Thumb1 16bit instructions to support Coretex-M0/M0+
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; Flash/memory origin and size must be changed to values for target device.
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.code vector
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.required
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.origin 0x00000000 ; flash
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.qbyte 0x20004000 ; stack = ram top
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.qbyte extent (@vector) + 1 ; +1 for Thumb flag
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#repeat 15
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.qbyte @handle + 1 ; +1 for Thumb flag
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#endrep
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.code handle
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.alignment 4
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loop: b.n loop
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.data ram
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.required
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.origin 0x20000000 ; ram start
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; last section
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.trailer _trailer
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; standard abort function
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.code abort
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.alignment 4
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ldr.n r0, offset (SYS_EXIT) + offset (SYS_EXIT) % 4
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ldr.n r1, offset (ADP_Stopped_ApplicationExit) + offset (ADP_Stopped_ApplicationExit) % 4
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bkpt.n 0xab
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loop:
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b.n loop
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.align 4
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SYS_EXIT: .qbyte 0x18
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ADP_Stopped_ApplicationExit: .qbyte 0x20026
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; standard _Exit function
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.code _Exit
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.alignment 4
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bl @abort
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; standard getchar function
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.code getchar
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.alignment 4
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ldr.n r0, offset (SYS_READC) + offset (SYS_READC) % 4
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mov r1, 0x00
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bkpt.n 0xab
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bx.n lr
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.align 4
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SYS_READC: .qbyte 0x07
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; standard free function
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.code free
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.replaceable
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.alignment 4
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bx.n lr
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; standard malloc function
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.code malloc
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.replaceable
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.alignment 4
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ldr.n r2, offset (heap) + offset (heap) % 4
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ldr.n r0, [r2, 0]
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ldr.n r3, [sp, 0]
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add.n r3, r3, r0
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str.n r3, [r2, 0]
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bx.n lr
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heap: .qbyte @_heap_start
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; heap start
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.data _heap_start
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.alignment 4
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.reserve 4
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.require _init_heap
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.initdata _init_heap
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.alignment 4
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ldr r0, [pc, offset (heap)]
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ldr r1, [pc, offset (start)]
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str r1, [r0, 0]
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b skip
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heap: .qbyte @_heap_start
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start: .qbyte extent (@_trailer)
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skip:
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; standard putchar function
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.code putchar
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.alignment 4
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ldr.n r0, offset (SYS_WRITEC) + offset (SYS_WRITEC) % 4
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mov r1, sp
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bkpt.n 0xab
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ldr.n r0, [r1]
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bx.n lr
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.align 4
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SYS_WRITEC: .qbyte 0x03
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